PRESENTATION
How advanced wafer technology and package experience impact SiC power devices
There is an undoubted potential of SiC based power devices. The technology matured over the last 20 years with a strong focus on chip technology and related figures of merit. However, for the ultimate success cost drivers need to be addressed and the chip performance has to be connected to the circuit around by using an adequate package technology. The presentation will give some insides how e.g. the cold split technology can be implemented in order to reduce the substrate impact. Furthermore, it will be discussed how the Infineon housing competence can be successfully combined with the ultrafast and low loss SiC chip technologies.
Peter Friedrichs
Infineon
Dr. Peter Friedrichs received his Dipl.-Ing. in microelectronics from the Technical University of Bratislava in 1993 and his Ph.D work at the Fraunhofer Institut FhG-IIS-B in Erlangen. His focus area of expertise was the physics of the MOS interface in SiC. In 1996 he joined the Siemens AG and was involved in the development of power devices on SiC. Peter joined SiCED GmbH & Co. KG, a company being a joint venture of Siemens and Infineon, on March the 1st, 2000. Since July 2004 he was the managing director of SiCED. In 2009 he achieved the Dipl.-Wirt.-Ing. From the University of Hagen. After the integration of SiCED’s activities into Infineon he joined Infineon on April 1st, 2011 and acts currently as Vice President SiC.